Refutation-Based Synthesis in SMT

Refutation-Based Synthesis in SMT” by Andrew Reynolds, Viktor Kuncak, Cesare Tinelli, Clark Barrett, and Morgan Deters. Formal Methods in System Design, vol. 55, no. 2, Dec. 2019, pp. 73-102, Springer US.


We introduce the first program synthesis engine implemented inside an SMT solver. We present an approach that extracts solution functions from unsatisfiability proofs of the negated form of synthesis conjectures. We also discuss novel counterexample-guided techniques for quantifier instantiation that we use to make finding such proofs practically feasible. A particularly important class of specifications are single-invocation properties, for which we present a dedicated algorithm. To support syntax restrictions on generated solutions, our approach can transform a solution found without restrictions into the desired syntactic form. As an alternative, we show how to use evaluation function axioms to embed syntactic restrictions into constraints over algebraic datatypes, and then use an algebraic datatype decision procedure to drive synthesis. Our experimental evaluation on syntax-guided synthesis benchmarks shows that our implementation in the CVC4 SMT solver is competitive with state-of-the-art tools for synthesis.

Keywords: Program synthesis; Satisfiability modulo theories; Automated deduction

BibTeX entry:

   author = {Andrew Reynolds and Viktor Kuncak and Cesare Tinelli and
	Clark Barrett and Morgan Deters},
   title = {Refutation-Based Synthesis in {SMT}},
   journal = {Formal Methods in System Design},
   volume = {55},
   number = {2},
   pages = {73--102},
   publisher = {Springer US},
   month = dec,
   year = {2019},
   issn = {1572-8102},
   doi = {10.1007/s10703-017-0270-2},
   url = {}

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